One well-known process used to interconnect silicon solar cells in order to provide cell arrays of a desired current and voltage capability involves the use of over-and-under contacts of a generally Z-shaped configuration. These contacts are used to connect the backside of one cell to the topside of another adjacent cell in order to interconnect the individual cells in series and/or parallel and thereby provide a required power generating capability for a particular solar panel.
As space and packing density requirements became more stringent in certain solar panel applications, e.g. on spacecraft, some solar cell manufacturers replaced the above over-and-under electrical interconnection technique with a so-called "wraparound" electrical interconnect configuration. Generally speaking, this wraparound approach will initially use conventional photolithographic masking, etching, and p-n junction forming steps to configure a p-n junction in a silicon wafer or substrate to a desired geometry and then make electrical contacts to each side of the p-n junction in such a manner as to extend both contacts "around" to a region adjacent one surface of the semiconductor substrate. This approach normally meant "wrapping" one of the p- or n-type contacts for the solar cell from one surface of the substrate around to the reverse side of the cell substrate where it was extended to a position adjacent the other contact. Using this approach, the individual silicon cells could then be spaced more closely to each other than they could have been spaced using the former over-and-under interconnect scheme. One such wraparound interconnection is described, for example, in U.S. Pat. No. 4,361,950, issued Dec. 7, 1982 to J. A. Amick and entitled "Method of Making Solar Cell With Wrap-Around Electrode".
It was conventional in such practice to employ an entire circular wafer and to process it in accordance with the above steps, and including wrapping a conductor from the front major surface around the edge of the wafer to the rear major surface so that the electrical contacts can be made at the back. Wafers are generally circular and provide poor surface efficiency. In order to improve the surface efficiency, after the processing the wafer edges have been cut off to result in a substantially square solar cell. However, in this trimming part of the original circumferential edge of the original wafer was left so that the corners of the square were cut off by a circular arc. These corners thus maintain the contact from front to back and the almost-square cells improve surface efficiency as compared to circular solar cells.
For many years, solar cell manufacturers have been working mostly with and processing three inch diameter silicon wafers and have thus committed many of their manufacturing lines to the fabrication of solar cells which are approximately three inches from corner to corner. These dimensions are used in order to minimize material waste when cutting the solar cells from three inch diameter wafers. Thus, most solar cell manufacturers have invested substantial sums of money in building and maintaining production lines for making conventional three inch dimension silicon solar cells.
More recently, however, these silicon wafer manufacturers have been growing four inch and larger diameter crystal ingots as a result of various technical breakthroughs in the crystal growth arts. If 4 inch wafers are run on a 3 inch production line, everything operates in a correct way until the wafers are cut square. When a 4 inch wafer is cut square, the entire original circumferential surface having the wraparound interconnection is cut off so that such cells are inoperative. Thus, the change from 3 inch diameter to 4 inch diameter circular wafers presents problems on present solar cell production lines. This change means that future solar cell production lines should now be equipped not only to handle these larger diameter wafers, but they should also still be capable of providing some quantity of the standard three inch dimension solar cells, which are still a preferred dimension cell by many manufacturers of silicon solar panels.
In processing the three inch diameter silicon wafers to form the corresponding three inch by three inch dimension solar cells, one practice has been to dice the wafers on four sides of a square whose corners extend geometrically just beyond the periphery of the cylindrical silicon wafer. In this manner, each silicon die is configured by four adjacent perpendicular edges, each interconnected by a short arcuate section once forming the edge of the cylindrical wafer. These dice are then appropriately masked for diffusion so as to define a desired p-n junction geometry and then loaded into a diffusion furnace where a p-n junction is formed. Thereafter, the dice are further processed using conventional photolithography and dielectric layer forming steps in preparation for subsequent wraparound metallization steps.
Using processes of the above type known in the art, the p-n junction could be extended from one side of the cell to the reverse side for receiving both the p and n type contacts on the same side of the wafer. Or in the case of a planar p-n junction geometry, the metallization was wrapped from one side of the cell to the other. In either case involving the processing of three inch diameter wafers, one edge of the wafer ultimately formed one edge of the solar cell, so that this edge was conveniently exposed for either the p-n junction wraparound steps or the metallization wraparound steps.
On the other hand, if larger diameter, e.g., four inch, wafers were used in the solar cell fabrication process, the above prior art processes could not be used to form individual three inch-by-three inch solar cells or cells with other dimensions smaller than the diameter of the four inch or larger diameter silicon wafer from which the cell is fabricated. Thus, these prior art processes are of limited utility in the larger diameter wafer processing lines in that the ultimate dimensions of the solar cell are always determined by the wafer diameter. It is the solution to this latter problem to which the present invention is directed.